1. Field of Invention
Embodiments of the invention relate generally to pattern-recognition processors and, more specifically, in certain embodiments, to connection architectures of such processors.
2. Description of Related Art
In the field of computing, pattern recognition tasks are increasingly challenging. Ever larger volumes of data are transmitted between computers, and the number of patterns that users wish to identify is increasing. For example, spam or malware are often detected by searching for patterns in a data stream, e.g., particular phrases or pieces of code. The number of patterns increases with the variety of spam and malware, as new patterns may be implemented to search for new variants. Searching a data stream for each of these patterns can form a computing bottleneck. Often, as the data stream is received, it is searched for each pattern, one at a time. The delay before the system is ready to search the next portion of the data stream increases with the number of patterns. Thus, pattern recognition may slow the receipt of data.
Such patter-recognition processors may include a large number of finite state machines (FSM) that move from state to state as inputs are processed. Internal connections of conventional processors rely on physical wires connected to a flip-fop or other memory element. However, such connections may be incapable of meeting the performance for a pattern-search processor. Further, such connections are generally not configurable or capable of meeting a desired functionality. The distance, speed, and configurability of the connections in a pattern-recognition processor may be challenging to implement in silicon.